An integrated circuit is provided comprising a processor, an onboard system clock having a ring oscillator for generating a clock signal, a memory, and clock trim circuitry. The processor is arranged to, in response to receiving an external signal, determine the number of cycles of the clock signal during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and to output the determined number of cycles to an external circuit. The processor is also arranged to, in response to receiving a trim value based on the determined number of cycles from the external circuit, store the trim value in the memory and control the clock trim circuitry to trim the frequency of the clock signal generated by the ring oscillator using the trim value.