A varactor has a plurality of alternating P- wells and N+ regions formed in a silicon layer. Each of the P- wells forms a first N+/P- junction with the N+ region on one of its side and a second N+/P- junction with the N+ region on the other of its sides. A gate oxide is provided over each of the P- wells, and a gate silicon is provided over each of the gate oxides. The potential across the gate silicons and the N+ regions controls the capacitance of the varactor.

 
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> Self-aligned body tie for a partially depleted SOI device structure

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