A receiver includes an antenna, an impedance-matching circuit, a receive circuit, a control circuit, a digital-to-analog (D/A) converter, a mode switch, and an EEPROM. The impedance-matching circuit includes a variable-capacitance diode. The control circuit determines an operation mode set by the mode switch. It controls the D/A converter to produce different levels of the reverse bias voltage when the operation mode is set to an adjustment mode. It determines strength of receive signals based on receive signal strength indication (RSSI) signals indicating strength of the receive signals. It determines a maximum value of the RSSI signals based on the results of the determination, and stores D/A input data corresponding to the maximum value in the EEPROM as the adjustment data. It loads the adjustment data from the EEPROM and controls the D/A converter to produce a reverse bias voltage based on the adjustment data. The D/A converter applies the voltage to the variable-capacitance diode.