A data readout circuit for reading memory data from a resistance change memory disposed at a point where a bit line and a word line intersect by setting a potential of the bit line to a predetermined bias potential and detecting a current value flowing in the resistance change memory, includes a capacitance device connected to the bit line via a switching device; and a current supply circuit connected to both ends of the switching device to provide a current to the bit line such that the potential of the bit line is equal to a potential of the capacitance device.

 
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> Smart memory read out for power saving

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