A wiring board has a substrate, a bank disposed above the substrate and providing a plurality of regions, and a conductive layer and first and second interconnecting lines which are parallel to each other and formed between the bank and the substrate. The first interconnecting line is formed in a position closer to the substrate than the second interconnecting line. The vertical centerline of the first interconnecting line is not coincide with the vertical centerline of the second interconnecting lines. The conductive layer is formed in a position closer to the substrate than the second interconnecting line. The vertical centerline of the conductive layer is not coincide with the vertical centerline of the second interconnecting line. The conductive layer and first interconnecting line have portions which are not located under the second interconnecting line and extend in opposite width directions.