A chip design verifying and chip testing apparatus is provided including a storing means for storing an application program verifying an operation of a chip and testing the chip, the chip having a plurality of blocks, an I/O file, and a test vector; an interface means controlling a data transmission between the storing means and the chip, the interface means having a data applying means for applying the I/O file and/or the test vector outputted from the storing means and a data storing means for storing data outputted from the chip; and a computer including a CPU for performing and controlling the application program.