A "high availability" system comprises multiple switches under the control of a control processor ("CP"). The firmware executing on the processor can be changed when desired. Consistent with the high availability nature of the system (i.e., minimal down time), a single CP system implements a firmware change by loading new firmware onto the system, saving state information pertaining to the old firmware using a reboot manager as a standby image, preventing the old firmware from communicating with the switches, bringing the new firmware to an active state and synchronizing the saved state information to the new firmware using the reboot manager as an active image.