Solder bump structures for semiconductor device packaging is provided. In one embodiment, a solder bump structure comprises a semiconductor substrate, the substrate has at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad. At least one patterned and etched polymer layer is formed on a portion of the contact pad. At least one patterned and etched conductive metal layer is formed above the polymer layer and is aligned therewith. And at least one layer of solder material having a solder height is provided above the conductive metal layer, the layer of solder is aligned with the conductive metal layer, the layer of solder is thereafter reflown thereby creating a solder ball.

 
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> Semiconductor device including dual damascene interconnections

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