A high-frequency compound instruction mechanism and method allows performing a common compare immediate function before an add function has completed, thereby reducing the number of cycles to perform the add-compare function. By increasing the speed of performing the add-compare function, a branch mispredict signal may be provided to an instruction pipeline before data registers are affected by the pipelined instructions. The compound instruction mechanism of the preferred embodiments may be implemented within space that is primarily unused within arithmetic logic units, resulting in an implementation that only marginally increases space requirements on an integrated circuit.