A method, computer program product and system for assessing the impact of anomalies in a physical device. An anomaly may be detected in an integrated circuit. Upon detecting an anomaly, an image of the anomaly may be captured. A design layout of the image may be obtained. The image coordinates of the detected anomaly may be transformed into a common reference system, such as the design layout. By using a common unit of reference instead of different reference systems, automatic coordination of the integrated circuit and the design layout may have to be performed once instead of multiple times for multiple tools. The image coordinates of the detected anomaly may be transformed to the coordinates of a common reference system by vectorizing the image, matching polygons in both the image and the design layout and aligning the image of the anomaly with the design layout of the image.