An integrated circuit, among other embodiments, includes an output circuit to provide a differential signal on first and second contacts during a first mode of operation, such as in a read or write mode of operation, and a single-ended signal on the first contact during a second mode of operation, such as a test mode of operation. A first variable resistor, responsive to a first control signal, is coupled to a first voltage source and the first contact. A second variable resistor, responsive to a second control signal, is coupled to a second voltage source and the second contact. A first transistor has a first electrode coupled to the first contact, a second electrode coupled to the current source and a gate to receive a first input signal. A second transistor has a first electrode coupled to the second contact, a second electrode coupled to the current source and a gate to receive a second input signal.

 
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> System on a chip having a non-volatile imperfect memory

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