Error checking and correcting (ECC) is performed on data held in a content addressable memory. An error check circuit receives words from a memory circuit or circuits, generates an error status and generates a corrected value when appropriate. A control circuit sequences through each of the words of the memory circuit(s), periodically reads from the memory circuit the next word in the sequence and provides the next word to the error check circuit. The bandwidth consumed by the periodic error check phase can be controlled by adjusting the interval between reads.