An optoelectronic transceiver includes first and second controller ICs. Each controller IC includes logic, a memory, an interface, and at least one input port. Each memory is configured to store digital diagnostic data and has a unique serial device address to allow a host access to each of these controller ICs separately and independently. At least some of the digital diagnostic data is common to both the first controller IC and the second controller IC. The inclusion of two controller ICs allows the same diagnostic data to be stored in completely different memory mapped locations. This allows hosts that are preconfigured differently to read different memory mapped locations on the different controller ICs to obtain the same diagnostic data.

 
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> High-performance hybrid processor with configurable execution units

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