A plasma display panel comprises a plurality of row electrode pairs (X, Y) and a dielectric layer 12 covering the row electrode pairs (X, Y) provided on a front glass substrate 10, and also column electrodes D provided on a back glass substrate 13 to intersect with the row electrode pairs (X, Y) so as to form display discharge cells C1 in a discharge space at the intersections. A discharge area C2 is formed between the adjacent display discharge cells C1 in the column direction to provide for a discharge created between the back to back row electrodes X and Y of the adjacent row electrode pairs (X, Y). A recess groove 12A is formed in a portion of the dielectric layer 12 opposite each discharge area C2.