Conductor layers 2A and insulating layers 4A are alternately stacked so as to prepare a base material 17. A plurality of grooves 18 having a predetermined width are formed in a surface of the base material 17 in such a manner that these plural grooves 18 are located parallel to each other along a stacking layer direction in order to form a coil inner peripheral portion. Embedding materials 5 are filled into the grooves 18. Surfaces 16 of the base material into which the embedding materials 5 have been filled are flattened by polishing. The conductor layers 2A located adjacent to each other are connected to each other, so that helical coils which constitute inductive elements are constructed. Then, both the front plane and the rear plane of the resultant base material are covered by an insulating layer, which is cut so as to obtain respective chips.