A method for conserving power in an apparatus is disclosed. The method generally includes the steps of (A) disabling a subset of a plurality of debug operations using a clock signal at a first frequency while in a normal mode, (B) performing a plurality of debug operations using the clock signal at a second frequency while in a debug mode, wherein the first frequency is slower than the second frequency to conserve power, and (C) adjusting the clock signal to one of the first frequency and the second frequency in response to receiving a command generated external to the apparatus to transition to a respective one of the normal mode and the debug mode.