A video signal processing apparatus and a design method therefor are provided, and more particularly, a design method for a video signal processing integrated circuit (IC), in which to solve the shortage of pin ports caused by designing a video signal processor in a single IC, a vertical synchronization signal is output and a quasi synchronization signal is input through a single pin port, and an IC and a video signal processing apparatus thereby are provided. According to the design method, by designing a vertical synchronization dividing circuit inside an IC without increasing the number of pins in a video signal processing IC, the present invention can reduce the number of components, material costs, and save the PCB space. In addition, by integrating the vertical synchronization dividing circuit inside an IC, the component difference of a discrete device can be reduced, which enhances IC performance.