The MFIS transistors heretofore have a problem that after data writing, the data disappear in terms of memory transistor operation in about one day at most. This is mainly because the buffer layer and the ferroelectric have a high leakage current and, hence, charge is accumulated around the interface between the ferroelectric and the buffer layer so as to shield the electric polarization memorized by the ferroelectric, making it impossible for the electric polarization of the ferroelectric to control electrical conduction between the source and the drain in the transistor. In the present invention, by constituting an insulator buffer layer 2 of HfO.sub.2+u or Hf.sub.1-xAl.sub.2xO.sub.2+x+y, the leakage current flowing through each of the insulator buffer layer 2 and a ferroelectric 3 can be reduced and a memory transistor having a truly sufficient long data holding time is realized.

 
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> Method of dry etching semiconductor substrate to reduce crystal defects in a trench

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