A low power matchline sensing scheme where power is distributed according
to the number of mismatching bits occurring on a matchline is disclosed.
In particular, match decisions involving a larger number of mismatched
bits consume less power compared to match decisions having a lesser
number of mismatched bits. The low power matchline sensing scheme is
based upon a precharge-to-miss sensing architecture, and includes a
current control circuit coupled to each matchline of the content
addressable memory array for monitoring the voltage level of the
matchline during a search operation. The current control circuit provides
a voltage control signal to the current source of the matchline to adjust
the amount of current applied to the matchline in response to the voltage
of the matchline. In otherwords, matchlines that are slow to reach the
match threshold voltage due to the presence of one or more mismatching
bits will receive less current than matchlines having no mismatching
bits. Significant power reduction without compromising search speed is
realized since matchlines carrying a match result are provided with the
maximum amount of current.