A vertical FET structure with nanowire forming the FET channels is disclosed. The nanowires are formed over a conductive silicide layer. The nanowires are gated by a surrounding gate. Top and bottom insulator plugs function as gate spacers and reduce the gate-source and gate-drain capacitance.

 
Web www.patentalert.com

> Compounds, compositions and methods for the treatment of diseases characterized by A-33 related antigens

~ 00353