A system and method for implementing a digital filter, comprising computing on a digital computer a mathematical model of a digital filter; where the mathematical model has a predetermined first set of parameters. The first set of parameters is converted to a second set of parameters, where the second set of parameters includes control parameters for a pre-selected digital-filter integrated circuit (IC). The system then verifies that the execution of the second set of parameters by the digital-filter IC substantially reproduces the behavior of the mathematical model. The verified second set of parameters is then written to permanent storage on the digital-filter IC. The system preferably reads a device-file map characteristic of the particular filter IC intended to be used to implement the filter under design. The converting of the first set of parameters to a second set of parameters further includes computing values corresponding to the second set of parameters that conform to the numerical precision available in the digital-filter IC, and assigning the values so computed to the second set of parameters. The mathematical model of the digital filter is verified by re-computing the model using the second set of parameters.

 
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> Methods and apparatus for transforming sequential logic designs into equivalent combinational logic

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