Briefly, in accordance with an embodiment of the invention, a system and method to order memory operations is provided. The method may include using at least one signal to indicate that a particular kind of memory operation is not globally observable but is observable by at least one processor of the system. The system may include a processor to use at least one signal for memory consistency, wherein the at least one signal indicates that a particular kind of memory operation is not globally observable in the system but is observable by at least one processor of the system. Other embodiments are described and claimed.