An apparatus and method for sensor architecture based on bulk machining of Silicon-On-Oxide wafers and fusion bonding that provides a symmetric, nearly all-silicon, hermetically sealed MEMS device having a sensor mechanism formed in an active semiconductor layer, and opposing silicon cover plates each having active layers bonded to opposite faces of the sensor mechanism. The mechanism is structured with sensor mechanical features structurally supported by at least one mechanism anchor. The active layers of the cover plates each include interior features structured to cooperate with the sensor mechanical features and an anchor structured to cooperate with the mechanism anchor. A handle layer of each cover plate includes a pit extending there through in alignment with the cover plate anchor. An unbroken rim of dielectric material forms a seal between the cover plate anchor and the pit and exposes an external surface of the cover plate anchor.

 
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> Scalable integrated logic and non-volatile memory

~ 00360