An analog image signal from an input terminal 101 is converted in an ADC 102 to digital data, then stored in a frame memory 103, then subjected to compression processing in a compression processing module 104, and then recorded in a recorder 105. The compressed data recorded in the recorder 105 is read out, then subjected to decompression processing in a decompression processing module 106, and then stored in a frame memory 107. The operation of the compression processing module 104 is controlled by a frame rate controller 110. Thus, the problem of frame data drop-out or reproducing processing delay occurrence when it becomes unable to obtain full frame real time frame capturing, real time compression and real time decompression due to CPU performance insufficiency is solved.

 
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