A data read circuit and method for use in a semiconductor memory device
that has a memory cell array are provided. The circuit includes a
selector for selecting a unit cell within the memory cell array in
response to an address signal; a clamping unit for supplying a clamp
voltage having a level for a read operation to a bit line of the selected
unit cell in response to a clamp control signal; a precharge unit for
precharging a sensing node to a voltage having a power source level in
response to a control signal of a first state in a precharge mode, and
compensating through the sensing node for a reduced quantity of current
at the bit line in response to a control signal of a second state in a
data sensing mode; and a sense amplifier unit for comparing a level of
the sensing node with a reference level, and for sensing data stored in
the selected unit cell.