An elevated containment structure in the shape of a wafer edge ring surrounding a surface of a semiconductor wafer is disclosed, as well as methods of forming and using such a structure. In one embodiment, a wafer edge ring is formed using a stereolithography (STL) process. In another embodiment, a wafer edge ring is formed with a spin coating apparatus provided with a wafer edge exposure (WEE) system. In further embodiments, a wafer edge ring is used to contain a liquid over a wafer active surface during a processing operation. In one embodiment, the wafer edge ring contains a liquid having a higher refractive index than air while exposing a photoresist on the wafer by immersion lithography. In another embodiment, the wafer edge ring contains a curable liquid material while forming a chip scale package (CSP) sealing layer on the wafer.

 
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> Methods for maskless lithography

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