A multiprocessor computer system implements fault resilient booting by using appliance server management. While previous systems have utilized fault resilient booting, it has required the use of a baseboard management controller chip. The present invention avoids the need for this chip by utilizing the appliance server management architecture. The testing of the processors and the determination of the bootstrap processor is controlled by the system I/O device utilizing a timer and a latch.

 
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> Memory controller for padding and stripping data in response to read and write commands

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