An application-specific embeddable flash memory having three content-specific I/O ports and delivering a peak read throughput of 1.2 GB/s. The memory is combined with a special automatic programming gate voltage ramp generator circuit having a programming rate of 1 Mbyte/s for non-volatile storage of code, data, and embedded FPGA bit stream configurations. The test chip uses a NOR-type 0.18 .mu.m flash embedded technology with 1.8V power supply, two poly, six metal and memory cell size of 0.35 .mu.m.sup.2.