A single-poly non-volatile memory device invented to integrate into logic process is disclosed. This non-volatile memory device includes a memory cell unit comprising a PMOS access transistor that is serially connected to a PMOS storage transistor formed in a cell array area, and, in a peripheral circuit area, a high-voltage MOS transistor having a high-voltage gate insulation layer is provided. The PMOS access transistor has an access gate oxide layer that has a thickness equal to the thickness of the high-voltage gate insulation layer in a peripheral circuit area.

 
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