The present invention concerns a phase Detector for detecting a phase difference between a data clock DATA-CLK and a reference clock REF-CLK using a data signal DATA. A trasnsition of the data signal DATA is synchronous with a transition of the data clock DATA-CLK. The data clock DATA-CLK and the reference clock REF-CLK have the same frequency. The phase detector includes first signal generator for generating a first binary signal ERRQ a second signal generator for generating a second binary signal ERRI. The pulse width of the second binary signal ERRI is equal to a second time difference .DELTA.T2 between a transition of the data signal DATA and a transition of the second reference clock signal CKI adjacent to the transition of the data signal DATA.

 
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> Method, system, and program for transmitting input/output requests from a primary controller to a secondary controller

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