An apparatus and method for tracing back a probing location to identify the circuit element being probed on a device under test (DUT). The coordinates of the irregularity on the DUT are used to trace back to the logic cone to decipher the root-cause of the irregularity. The Def and Lef files are interrogated using the coordinates to obtain the cell and net data to enable the investigation. Additionally, a schematic viewer is used to investigate the logic cone to potential root-causes for the irregularities.