NVM arrays include rows and columns of NVM cells comprising a floating gate, a programming element, and a logic storage element. During a programming or erase mode, the floating gate of each cell is charged to a predetermined level. At the beginning of a read mode, all storage elements are pre-charged to a high supply voltage level. Following the pre-charge, selected cells are read to determine stored bit values. A charge status of the floating gate of each cell determines whether the storage element is turned on and the pre-charge voltage is pulled down corresponding to a bit value.