An object is to provide an image signal processing device capable of converting digital image signals into analog image signals using a circuit of small scale. Addition high-order bit pixel data is generated by adding, to high-order bit pixel data comprising an high-order consecutive bits of input pixel data, a value corresponding to the least significant bit digit of the high-order bit pixel data. In a prescribed period, during a time period corresponding to a value of low-order bit pixel data comprising low-order consecutive bits of the input pixel data, the addition high-order bit pixel data is taken to be the data for D/A conversion, and in other period, the high-order bit pixel data is taken to be the data for D/A conversion. By means of this configuration, even when the resolution of a D/A converter is lower than the resolution required by the input pixel data, the resolution of the image ultimately viewed during the prescribed period is equivalent to the resolution required by the input pixel data. Consequently, to the extent that the resolution of the D/A converter can be lowered, the circuit scale can be reduced.