In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion of the semiconductor substrate are sequentially etched to form a storage node hole. A lower electrode is conformally formed in the storage node hole and on the interlayer dielectric layer. A planarization process is performed to remove a portion of the lower electrode layer that lies on the interlayer dielectric layer and to form a lower electrode in the storage node hole. A dielectric layer and an upper electrode layer are sequentially formed on the lower electrode. The upper electrode layer and the dielectric layer are sequentially patterned.