Accessing multiple copies of RAM distributed throughout an ASIC/FPGA and maintaining their content consistency

A system and method for writing the same data field to multiple RAM copies during a single write cycle that fans out write data, address data, and control data to multiple RAMs. The multiple copies of data held at the same address in the multiple RAM copies are also read during a single write cycle and the data from each RAM copy is concatenated into a single word that is read during a single read cycle.

Web www.patentalert.com

> Method and system for dynamically operating memory in a power-saving error correcting mode

~ 00379