When a plurality of sub-processors are daisy chained in a loop, for example, to a main processor by a one-way bus, a command packet from the main processor addressed to itself is transmitted to the one-way bus which form a return path back to the main processor so as to easily specify a fault portion. If the command packet is returned to the main processor within a predetermined time, it is determined that no fault exists within the electronic device. When a fault exists, a test signal is transmitted to sub-processors via a dedicated signal line, separate from the one-way bus, to trigger a test packet that will be routed through the one way bus. The faulty portion in the electronic device is specified based on whether the test packet transmitted via the one-way bus in accordance with the test packet from each sub-processor is received within a predetermined time.