When a predetermined instruction is fetched and decoded, an instruction issuing unit develops the instruction operation into a multiflow of a previous flow and a following flow and issues the instruction by in-order. It is held into a reservation station. An instruction executing unit executes the instruction held in the reservation station by out-of-order. Further, an execution result of the instruction is committed by in-order. A multiflow guarantee processing unit guarantees an execution result of the previous flow stored in an allocation register on a register update buffer until the following flow is committed. Even if the previous flow is committed and the allocation register is released, the guaranteeing process is realized by stalling another instruction serving as a next register allocation destination in a decoding cycle until the following flow is committed.