A circuit and method provide rename register reallocation for simultaneous
multi-threaded (SMT) processors that redistributes rename (mapped)
resources between one thread during single-threaded (ST) execution and
multiple threads during multi-threaded execution. The processor receives
an instruction specifying a transition from a single-threaded to a
multi-threaded mode or vice-versa and halts execution of all threads
executing on the processor. The internal control logic then signals the
resources to reallocate the resources. Rename resources are reallocated
by directing an action at the rename mapper. When switching from SMT to
ST mode, the mapper is directed to drop entries for the dying thread, but
on a switch from ST to SMT mode, "dummy" instruction group dispatch
indications are sent to the mapper that indicate use of all architected
registers for each thread.