A system and method for enabling or disabling clocks to one or more portions of hardware circuitry, for example a display sub-system of a personal computer. A processor generates a command or data to a first circuit configured to perform a function based at least on the command or data. A clock generator selectively supplies clocks to the first circuit and a second circuit configured to perform a second function. A software interface circuit coupled to the processor and the clock generator autonomously determines based at least on the command or data whether the second circuit will perform the second function or be idle in an upcoming period and disables one or more of the clocks to the second circuit if the second circuit will be idle in the upcoming period.