A current sensing analog to digital converter (CS-ADC) is disclosed. The current sensing analog to digital converter comprises a modulator adapted to sense a change in current and generate an oversampled signal. The converter further includes a decimation filter system coupled to modulator for removing out of band noise from the signal and reduce the data rate to achieve a high resolution signal. A current sensing analog to digital converter (CS-ADC) is disclosed that samples the charge or discharge current flowing through an external sense resistor R.sub.SENSE. The sample from the R.sub.SENSE is processed by a delta-sigma modulator which generates an over sampled noise shaped signal. From this signal a decimation filter system removes the out-of band noise and reduces the data rate to achieve a high-resolution signal. The CS-ADC also provides regular current detection. The regular current detection compares the data from conversion against charge/discharge threshold levels specified by the user. To save power a special mode where the user configures the regular current sampling interval is provided. This allows ultra-low power operation in power-save mode when small charge or discharge currents are flowing.