A multi-layered semiconductor structure with free areas limiting the placement of test keys. First and second scribe lines intersect to define one corner point of a die. The first and second scribe lines are part of the multilayered structure and at least one layer of the multi-layer structure is a low-k dielectric layer. Free area A.sub.1 is defined on the first scribe line and is defined by the equation A.sub.1=D.sub.1.times.S.sub.1, where D.sub.1 is the distance from the corner point of the die toward the main area of the die, and S.sub.1 is the width of the first scribe line. Free area A.sub.S is defined at the intersection of the first scribe line and the second scribe line adjacent the die and is defined by the equation A.sub.S=S.sub.1.times.S.sub.2, where S.sub.2 is the width of the second scribe line.