A system for obtaining translation information from a data processing system. The system includes circuitry for receiving an external request for translation information. The circuitry determines whether the requested translation information is present in memory management circuitry of a data processing system. If the translation information is not present in the memory management circuitry, the circuitry requests retrieval of the information by a processor core. In one embodiment, the request is performed by generating an interrupt to the processor core. In other embodiments, the request is preformed by requesting the activation of a program thread to be executed by the processor core.

 
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> In-memory table structure for virtual address translation system with translation units of variable range size

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