A device for sequentially storing input bit symbols of a given interleaver size N in a memory at an address from 0 to N-1 and reading the stored bit symbols from the memory. The device comprises a look-up table for providing a first variable m and a second variable J satisfying the equation N=2.sup.m.times.J; and an address generator for generating a read address depending on the first and second variables m and J provided from the look-up table. The read address is determined by 2.sup.m(K mod J)+BRO.sub.m(K/J), where K (0.ltoreq.K.ltoreq.(N-1)) denotes a reading sequence, BRO.sub.m(y) is the bit-reversed m-bit value of y and / is a function in which a quotient of K divided by d is obtained, the quotient being an integer.