At least one of a start abnormality detector (31), a temperature abnormality detector (32) and a voltage abnormality detector (33) has a latch inhibiting circuit for inhibiting retention of a detecting state when one of the abnormality detectors detects an abnormality, so that a current abnormality detector (34) can be inhibited from detecting an abnormal input current caused when the oscillation is halted by the abnormality detector. Accordingly, after the abnormality is removed, automatic resetting can be easily accomplished without causing the oscillation to halt as a result of the current abnormality detector detecting the presence of the abnormality. Also, since a power source abnormality detecting circuit (30) is designed in the form of an analog circuit, a low cost can be achieved and the monitoring level can be modified. In addition, the monitoring level associated only with the temperature abnormality occurring in an IGBT element (7) can be modified.