A memory system including a first and second of set of socket pads adapted for connection to memory module continuity pins. The memory system also includes a first indicator corresponding to the first set of socket pads. The memory system also includes a second indicator corresponding to the second set of socket pads. The first indicator is active and the second indicator is inactive when the first and second set of socket pads are empty. The first indicator is inactive and the second indicator is inactive when then first and second set of socket pads contain the continuity pins. The first indicator is inactive and the second indicator is active when the first set of socket pads contain the continuity pins and the second set of socket pads is empty.