A system for processing digital images. The system may included a controller that includes a processor and a memory. The system may also include a plurality of image processing blocks operatively coupled with the controller. Each image processing block can be configured to perform a different image processing operation. The image processing blocks and controller can be interconnected and configured to provide sequential pixel processing, in which each image processing block processes input pixels so as to produce output pixels, with the output pixels of an upstream one of the image processing blocks can be fed forward as the input pixels to a downstream one of the image processing blocks. The system may also include a classification block configured to obtain, for each of the image processing blocks, updated classification data for the input pixels to be applied to the image processing block. Processing at each image processing block can be dynamically controlled based on the updated classification data for the input pixels applied to the image processing block.