An apparatus and method for generating a control pulse for closing an active wordline in a memory device is provided. A timeout generator circuit having a time delay portion and a reset portion may be used to generate a close signal. The time delay portion may define a predetermined time delay interval. The timeout generator may be used in combination with an address transition detector in a refresh controller for a memory device. A method is given in which a control pulse is generated in response to an active mode signal, a timer measuring a predetermined time delay interval is activated in response to the control pulse, a close signal is produced in response to the expiration of the predetermined time delay interval, and the active wordline is closed in response to the close signal.