A set of processors, co-processors and processor cores having a Boolean logic unit, wherein the Boolean logic unit is operable, respectively, for performing the short-circuit evaluation of Conjunctive Normal Form Boolean expressions/operations, Disjunctive Normal Form Boolean expression/operations, or both. Each processor or processor core also includes a plurality of input/output interfaces, operable for receiving a plurality of compiled Boolean expressions/operations and transmitting a plurality of compiled results, and a plurality of registers. An associated processing method including starting an operation related to a Conjunctive Normal Form Boolean expression comprising a conjunct or related to a Disjunctive Normal Form Boolean expression comprising a disjunct, evaluating the conjunct or disjunct, and selectively short-circuiting a portion of the Boolean expression.