A memory module, which enables a module-internal, cross-chip electrical functional test of a plurality of integrated memory chips arranged on a printed circuit board of the memory module, includes a test device arranged separately from the memory chips on the printed circuit board. The test device relies on a clock signal provided by an external tester and generates the test signals required for carrying out the functional test and forwards the signals via control lines, address lines, data lines, and lines for the selection of individual memory chips to the latter. The partial integration of test functions into the test device enables a greater independence with respect to external electromagnetic interference influences without the space requirement of the memory module being increased overmuch.

 
Web www.patentalert.com

< Method and apparatus for automatic rate adaptation in a DOCSIS upstream

> Semiconductor integrated circuit designing method and program

~ 00403