A program of the present invention is compatible with a plurality of system configurations. When a process jumps to a bootstrap body, CPU configuration and initialization of a timer and a data cache are performed. When the process is not executed on a cache RAM or when the process is executed in an external mode or a ROMless state, data is copied from ROM to RAM, and then the process jumps to a cache RAM area. Then, initialization of a stack, setting of an interrupt vector, and initialization of a heap are sequentially performed. The present invention can be applied to an apparatus for developing a system LSI.